||Program Manager, IBM Technology Products Group Headquarters
IEEE 1998 Solid-State Circuits Award Winner
National Academy of Engineering of the USA
- Chairman (1997~2000) and Co-Founder, Global Unichip Corporation (IC Design Foundry)
- Co-Founder, Ardentec Corporation (IC Testing Foundry)
- Chairman and CEO, TM Technology Inc. (Heterogeneous Integration Chip Design)
As a researcher, design architect, entrepreneur and chief executive, Dr. Lu has dedicated his career to the worldwide IC design and semiconductor industry. He is Chairman, CEO and Founder of Etron Technology, Inc. and co-founded several other high-tech companies including Ardentec and Global Unichip Corp.
Dr. Lu worked for the IBM Research Division and then the Headquarters from 1982 to 1990 and won numerous IBM recognition awards, including an IBM Corporate Award. He co-invented and pioneered a 3D-DRAM technology, known as the Substrate-Plate Trench-Capacitor (SPT) cell, along with its associated array architecture, which has been widely used by IBM and its licensees from 4Mb to 1Gb DRAMs and embedded DRAMs. Dr. Lu designed a High Speed CMOS DRAM (HSDRAM) chip in 1984, 3X faster than normal DRAMs, the concept of which becomes core technologies of many major DRAMs. He was elected as an AdCom member of the IEEE Solid-State Circuits Society from 1977 to 1999, and is on the TPC (Technical Program Committees) of the IEEE International Solid States Circuits Conference (ISSCC) from 1988 to 2002 and of the Symposium on VLSI circuits since 1990, and as Chairman of A-SSCC (2014) and the TPC (2007). He is an IEEE Fellow, the recipient of the IEEE 1998 Solid-States Circuits Award, and a member of National Academy of Engineering of USA.
As a co-architect leading the 8-inch wafer and DRAM/SRAM/LOGIC technology developments for Taiwan’s semiconductor industry in early 1990s, which later creates many Taiwan companies as prominent silicon chip suppliers, Dr. Lu was thus awarded the National Medal of Excellence in Science and Technology, Taiwan, R.O.C. Since 1999 he has pioneered DRAM Known-Good-Die Memory products enabling customers’ 3D stacked-die system chips. This work summoned the new rise of an IC Heterogeneous Integration Era as described in his plenary talk at the 2004 ISSCC, demonstrating a new 3D IC trend in parallel to the Moore’s Law.
Dr. Lu received his B.S. in Electrical Engineering from National Taiwan University and M.S. and Ph.D. in EE from Stanford University. He holds over 24 U.S. patents and has published more than 50 technical papers. He serves as Chairman of TSIA (Taiwan Semiconductor Industry Association) and WSC (World Semiconductor Council), and was Chairman of Global Semiconductor Alliance (GSA, the former FSA) from 2009 to 2011. He is an Outstanding Alumnus of National Taiwan University and a Chair Professor (2005-2007) and an Outstanding Alumnus of National Chiao Tung University.